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74LVX125 Datasheet - STMicroelectronics

74LVX125 LOW VOLTAGE QUAD BUS BUFFERS

The 74LVX125 is a low voltage CMOS QUAD BUS BUFFERs fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications. Figure 1: Pin Connection And IEC Logic Symbols This device requires the 3-STATE co.

74LVX125 LOW VOLTAGE QUAD BUS BUFFERS (3-STATE) WITH 5V TOLERANT INPUTS s s s s HIGH SPEED: tPD=4.4ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC =3.3V SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4 mA (MIN) at VCC =3V BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) P.

74LVX125 Datasheet (227.45 KB)