74V1G126 Datasheet - STMicroelectronics

74V1G126 SINGLE BUS BUFFER 3-STATE

The 74V1G125 is an advanced high-speed CMOS SINGLE BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. PIN CONNECTION AND IEC LOGIC SYMBOLS October 1999 1/8 74V1G126 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2 4 3 5 SYMBOL 1G 1A 1Y GND VCC N.

® 74V1G126 SINGLE BUS BUFFER (3-STATE) PRELIMINARY DATA s s s s s s s s HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY S (SOT23-5L) C (SC-70) ORDER CODE: 74V1G126S 74V1G126C 3-STATE co.

74V1G126 Datasheet (57.19 KB)