74V1T70 Datasheet - STMicroelectronics

74V1T70 SINGLE BUFFER

The 74V1T70 is an advanced high-speed CMOS SINGLE BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. PIN CONNECTION AND IEC LOGIC SYMBOLS October 1999 1/7 74V1T70 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2 4 3 5 SYMBOL N.C. 1A 1Y GND VCC NAME .

® 74V1T70 SINGLE BUFFER PRELIMINARY DATA s s s s s s s s HIGH SPEED: tPD = 5.5 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1 µA (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUT SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V IMPROVED LATCH-UP IMMUNITY S (SOT23-5L) C (SC-70) ORDER CODE: 74V1T70S 74V1T70C The internal c.

74V1T70 Datasheet (47.04 KB)