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D950-CORE
16-Bit Fixed Point Digital Signal Processor (DSP) Core
PRELIMINARY DATA
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UNIT
YD-bus XD-bus
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ADDRESS CALCULATION UNIT
16 XA-bus YA-bus 16 16 16
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PROGRAM CONTROL UNIT
3 ID-bus IA-bus 16 16
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11 CONTROL
8
14 TEST & EMULATION
PO/P7
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s
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Peripherals and Memory s Macrocells for peripherals such as the bus switch unit, interrupt controller and DMA controller s Standard cells library, I/O library s Memory generators for RAM and ROM Development Tools s JTAG PC board with graphic windowed high level source debugger for AS-DSP emulation s Complete crash-barrier chain (assembler / simulator / linker) running on PC and SUN, s Complete GNU chain (assembler / simulator / linker / C compiler / C debugger) for SUN s VHDL model (SYNOPSYS & MENTOR)
4 September 1997
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