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M53230400DB0 - (M532304x0DB0/DW0) DRAM Module

Description

The Samsung M5323040(1)0D is a 4Mx32bits Dynamic RAM high density memory module.

The Samsung M5323040(1)0D consists of eight CMOS 4Mx4bits DRAMs in 24-pin SOJ package mounted on a 72-pin glass-epoxy substrate.

Features

  • Part Identification - M53230400DW0-C(4096 cycles/64ms Ref, SOJ, Solder) - M53230400DB0-C(4096 cycles/64ms Ref, SOJ, Gold) - M53230410DW0-C(2048 cycles/32ms Ref, SOJ, Solder) - M53230410DB0-C(2048 cycles/32ms Ref, SOJ, Gold).
  • Extended Data Out.
  • CAS-before-RAS refresh capability.
  • RAS-only and Hidden refresh capability.
  • TTL compatible inputs and outputs.
  • Single +5V±10% power supply.
  • 1st Gen. JEDEC standard PDPin & pinout.
  • PCB.

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Other Datasheets by Samsung Semiconductor

Part Number Description
M53230400DW0 (M532304x0DB0/DW0) DRAM Module
M53230400CB0 (M532304x0CB0/CW0) DRAM Module
M53230400CW0 (M532304x0CB0/CW0) DRAM Module
M53230404BT0-C (M53230404BT0/BY0) DRAM Module
M53230404BY0 (M53230404BT0/BY0) DRAM Module

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com DRAM MODULE M53230400DW0/DB0 & M53230410DW0/DB0 EDO Mode 4M x 32 DRAM SIMM using 4Mx4, 4K/2K Refresh, 5V GENERAL DESCRIPTION The Samsung M5323040(1)0D is a 4Mx32bits Dynamic RAM high density memory module. The Samsung M5323040(1)0D consists of eight CMOS 4Mx4bits DRAMs in 24-pin SOJ package mounted on a 72-pin glass-epoxy substrate. A 0.1 or 0.22uF decoupling capacitor is mounted on the printed circuit board for each DRAM. The M5323040(1)0D is a Single In-line Memory Module with edge connections and is intended for mounting into 72 pin edge connector sockets.
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