K4C89183AF - 288Mb x18 Network-DRAM2 Specification
www.DataSheet4U.com K4C89183AF 288Mb x18 Network-DRAM2 Specification Version 0.7 - 1 - REV.
0.7 Jan.
2005 K4C89183AF Revision History Version 0.0 (Oct.
2002) - First Release Version 0.01 (Nov.
2002) - Changed die revision from D-die to F-die - Corrected typo - Corrected DQS to DS and QS(DQS -> DS and QS) in AC timing table and timing diagram.
Version 0.1 (Apr.
2003) - Added 800Mbps(400Mhz) product - Changed operating temperature from Ta to Tc.
- Changed capacitance of ADDR/CMD/CLK From Min
K4C89183AF Features
* Parameter CL = 4 tCK Clock Cycle Time (min) tRC Random Read/Write Cycle Time (min) tRAC Random Access Time (min) IDD1S Operating Current (single bank) (max) IDD2P Power Down Current (max) CL = 5 CL = 6 K4C89183AF F6 4.0 ns 3.5 ns 3.0ns 20.0 ns 20.0 ns 320mA 70mA FB 4.5 ns 3.75 ns 3.33 ns 22.5 ns 22.
