S3C72N2 Datasheet (Samsung semiconductor) - The S3C72N2/C72N4 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrange

S3C72N2, The S3C72N2/C72N4 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrange

Table 1-1.

S3C72N2/C72N4 Pin Descriptions Pin Name P1.0 P1.1 P1.2 P1.3 P2.0 P2.1 P2.2 P2.3 P3.0 P3.1 P3.2 P3.3 Pin Type I Description 4-bit input port.

1-bit or 4-bit read and test is possible.

4-bit pull-up resistors are software assignable.

4-bit I/O port.

1-bit and 4-bit read/write and test is p

S3C72N2 Features

* such as, LCD direct drive capability, 8-bit timer/counter, and watch timer, the S3C72N2/C72N4 offers an excellent design solution for a wide variety of applications that require LCD functions. Up to 16 pins of the 64-pin QFP package, it can be dedicated to I/O. Four vectored interrupts provide fast