M464S3354BTS Datasheet - Samsung

M464S3354BTS SDRAM Unbuffered SODIMM

Pin Name A0 ~ A12 BA0 ~ BA1 DQ0 ~ DQ63 CLK0 ~ CLK1 CKE0 ~ CKE1 CS0 ~ CS1 RAS CAS Select bank Data input/output Clock input Clock enable input Chip select input Row address strobe Column address strobe Function Address input (Multiplexed) WE DQM0 ~ 7 VDD VSS SDA SCL DU NC Pin Name Write enable DQM Po.

256MB, 512MB Unbuffered SODIMM SDRAM SDRAM Unbuffered SODIMM 144pin Unbuffered SODIMM based on 512Mb B-die 64-bit Non ECC Revision 1.2 March 2004 Samsung Electronics reserves the right to change products or specification without notice. Rev. 1.2 March 2004 256MB, 512MB Unbuffered SODIMM Revision History Revision 1.0 (January, 2004) - First release Revision 1.1 (February, 2004) - Corrected typo. Revision 1.2 (March. 2004) - Corrected package dimension. SDRAM Rev. 1.2 March 2004 256.

M464S3354BTS Features

* Input signals are stable CKE ≤ VIL(max), tCC = 10ns CKE & CLK ≤ VI

M464S3354BTS Datasheet (277.36 KB)