Description
4 Simultaneous Operation Modes Allowed with Four Planes 5 Memory Map 6
PAGE Extended Status Register Definition 15 Partition Configuration Register Definition 16 Partition Configuration 16 1 Electrical Specifications 17 1.1 Absolute Maximum Ratings 17
Identifier Codes and OTP Address for Read Operation 7 Identifier Codes and OTP Address for Read Operation on Partition Configuration 7 OTP Block Address Map for OTP Program 8
1.2 Operating Conditions 17 1.2.1 Capacitance 18 1.2.2 AC Inp
Features
- Individual Block Lock and Block Lock-Down with Zero-Latency.
- All blocks are locked at power-up or device reset.
- Block Erase, Full Chip Erase, (Page Buffer) Word Program Lockout during Power Transitions Automated Erase/Program Algorithms.
- 3.0V Low-Power 11µs/Word (Typ. ) Programming.
- 0.6s Erase (Typ. ) Cross-Compatible Command Support.
- Basic Command Set.
- Common Flash Interface (CFI) Extended Cycling Capability.
- Minimum 100,00.
F640BFHEPTTLHFA_Sharp.pdf
