* Each DSPLL generates any output frequency from any input frequency
* Four or two DSPLLs to synchronize to multiple time domains
* Ultra-low phase jitter of 95 fs rms
* Enhanced hitless switching minimizes output phase transients
* Input frequency range:
Si5396
Silicon Laboratories
1.86 MB
Any-frequency any-output jitter attenuators.
Si5397/96 Data Sheet
Dual/Quad DSPLL™ Any-Frequency, Any-Output Jitter Attenuators
The Si5397 is a high-performance, 8-output jitter-attenuating cloc.
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