* High-speed: tpd = 4.1 ns (typ.) (VCC = 3.3 V) Low power dissipation: ICC = 2 µA (max) (Ta = 25°C) Input voltage level: VIL = 0.8 V (max) (VCC = 3 V) VIH = 2.0 V (min) (VCC = 3 V) Power-down protection provided on all inputs Balanced propagation delays: tpLH
TC74LVX00FN Datasheet (203.68 KB)
TC74LVX00FN
Toshiba ↗ Semiconductor
203.68 KB
Quad 2-input gate.
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TC74LVX00F/FN/FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74LVX00F,TC74LVX00FN,TC74LVX00FT
Quad 2-Input NAND.
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