TC4027BP Datasheet - Toshiba

TC4027BP DUAL J-K MASTER-SLAVE FLIP-FLOP

TC4027BP/BF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4027BP, TC4027BF TC4027B Dual J-K Master-Slave Flip Flop TC4027B is J-K master-slave flip-flop having RESET and SET functions. In the case of J-K made, when the clock input is given with both RESET and SET at “L”, the output changes at rising edge of the clock according to the states of J and K. When SET input is placed at “H”, and RESET input is placed at “L”, outputs become Q = “H”, and Q = “L”. When RESET input is place.

TC4027BP Datasheet (227.52 KB)