TC551001ATRI-10L

SILICON GATE CMOS STATIC RAM

Toshiba

TC551001ATRI-10L Features

* with an operating current of 5mNMHz (typ.) and a minimum cycle time of 85ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2~ typically. The TC551001API has three control inputs. Chip enable inputs (CE1, CE2) allow for dev

TC551001ATRI-10L General Description

The TC551001API is a 1,048,576 bit CMOS static random access memory organized as 131,072 words by 8 bits and operated from a single 5V power supply. Advanced circuit techniques provide both high speed and low power features with an operating current of 5mNMHz (typ.) and a minimum cycle time of 85ns.

TC551001ATRI-10L Datasheet (270.13 KB)