* High speed: tpd = 5.0 ns (typ.) at VCC = 5 V
* Low power dissipation: ICC = 2 μA (max) at Ta = 25°C
* Compatible with TTL outputs: VIL = 0.8 V (max) VIH = 2.0 V (min)
* Power down protection is provided on all inputs and outputs.
* Balanced propagation delay
TC74VHCT08AFN Datasheet (274.20 KB)
TC74VHCT08AFN
274.20 KB
Quad 2-input and gate.
TC74VHCT08AF/AFN/AFT/AFK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHCT08AF,TC74VHCT08AFN,TC74VHCT08AFT,TC74VHCT08AFK
Quad 2-Inp.
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