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TC74VHCT374AFK - Octal D-Type Flip-Flop

Download the TC74VHCT374AFK datasheet PDF. This datasheet also covers the TC74VHCT374AF variant, as both devices belong to the same octal d-type flip-flop family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • High speed: fmax = 140 MHz (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C.
  • Compatible with TTL inputs: VIL = 0.8 V (max) VIH = 2.0 V (min).
  • Power down protection is provided on all inputs and outputs.
  • Balanced propagation delays: tpLH ≈ tpHL.
  • Low noise: VOLP = 1.5 V (max).
  • Pin and function compatible with the 74 series (74AC/HC/F/ALS/LS etc. ) 374 type. TC74VHCT374AF TC74VHCT374AFT TC74VHCT374AFK Weight.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC74VHCT374AF_ToshibaSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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TC74VHCT540AFT OCTAL BUS BUFFER Toshiba Semiconductor
TC74VHCT540AFW OCTAL BUS BUFFER Toshiba Semiconductor
TC74VHCT541AF Octal Bus Buffer Toshiba Semiconductor
TC74VHCT541AFT OCTAL BUS BUFFER Toshiba Semiconductor

Other Datasheets by Toshiba

Part Number Description
TC74VHCT374AF Octal D-Type Flip-Flop
TC74VHCT374AFT Octal D-Type Flip-Flop
TC74VHCT374AFW OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT
TC74VHCT373AF Octal D-Type Latch
TC74VHCT373AFK Octal D-Type Latch

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TC74VHCT374AF/AFT/AFK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHCT374AF, TC74VHCT374AFT, TC74VHCT374AFK Octal D-Type Flip Flop with 3-State Output The TC74VHCT374A is an advanced high speed CMOS OCTAL FLIP-FLOP with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type flip-flop is controlled by a clock input (CK) and an output enable input ( OE ). When the OE input is high, the eight outputs are in a high impedance state. The input voltage are compatible with TTL output voltage. This device may be used as a level converter for interfacing 3.3 V to 5 V system.