* High speed: tpd = 7.7 ns (typ.) at VCC = 5 V
* Low power dissipation: ICC = 4 µA (max) at Ta = 25°C
* Compatible with TTL outputs: VIL = 0.8 V (max) VIH = 2.0 V (min)
* Power down protection is provided on all inputs and outputs.
* Balanced propagation delay
TC74VHCT573AFW Datasheet (292.29 KB)
TC74VHCT573AFW
292.29 KB
Octal d-type latch with 3-state output.
TC74VHCT573AF/AFW/AFT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHCT573AF,TC74VHCT573AFW,TC74VHCT573AFT
Octal D-Type Latch with.
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