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TC7WZ00FK - Dual 2-Input NAND Gate

General Description

2.

Key Features

  • (1) AEC-Q100 (Rev. H) (Note 1) (2) Wide operating temperature range: Topr = -40 to 125  (Note 2) (3) High output current: ±24 mA (min) (VCC = 3.0 V) (4) Super high speed operation: tpd = 2.4 ns (typ. ) (VCC = 5.0 V, CL = 50 pF) (5) Operation voltage range: VCC = 1.65 to 5.5 V (6) 5.5 V tolerant inputs (7) 5.5 V power down protection output (8) Matches the performance of TC74LCX series when operated at 3.3 V VCC Note 1: This device is compliant with the reliability requirements of AEC-Q100. For d.

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Datasheet Details

Part number TC7WZ00FK
Manufacturer Toshiba
File Size 140.57 KB
Description Dual 2-Input NAND Gate
Datasheet download datasheet TC7WZ00FK Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CMOS Digital Integrated Circuits Silicon Monolithic TC7WZ00FK TC7WZ00FK 1. Functional Description • Dual 2-Input NAND Gate 2. Features (1) AEC-Q100 (Rev. H) (Note 1) (2) Wide operating temperature range: Topr = -40 to 125  (Note 2) (3) High output current: ±24 mA (min) (VCC = 3.0 V) (4) Super high speed operation: tpd = 2.4 ns (typ.) (VCC = 5.0 V, CL = 50 pF) (5) Operation voltage range: VCC = 1.65 to 5.5 V (6) 5.5 V tolerant inputs (7) 5.5 V power down protection output (8) Matches the performance of TC74LCX series when operated at 3.3 V VCC Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales representative. Note 2: For devices with the ordering part number ending in J(CT. Topr = -40 to 85  for the other devices. 3.