17512LJC Datasheet - Xilinx

17512LJC XC17512LJC

The XC1700 family of configuration PROMs provides an easy-to-use, cost-effective method for storing large Xilinx FPGA configuration bitstreams. When the FPGA is in Master Serial mode, it generates a configuration clock that drives the PROM. A short access time after the rising clock edge, data appea.

17512LJC Features

* One-time programmable (OTP) read-only memory designed to store configuration bitstreams of Xilinx FPGA devices Simple interface to the FPGA; requires only one user I/O pin Cascadable for storing longer or multiple bitstreams Programmable reset polarity (active High or active Low) for compa

17512LJC_Xilinx.pdf