XCS05 Datasheet (Xilinx) - Spartan and Spartan-XL Families Field Programmable Gate Arrays

XCS05, Spartan and Spartan-XL Families Field Programmable Gate Arrays

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Function Generators Two 16 x 1 memory look-up tables (F-LUT and G-LUT) are used to implement 4-input function generators, each offering unrestricted logic implementation of any Boolean function of up to four independent input signals (F1 to F4 or G1 to G4).

Using memory look-up tables the

XCS05 Features

* Technology advancements have been derived from the XC4000XLA process developments. Configurable Logic Blocks (CLBs) The CLBs are used to implement most of the logic in an FPGA. The principal CLB elements are shown in the simplified block diagram in Figure 2. There are three look-up tables (LUT) wh