CP388X - NPN - Low Noise Amplifier Transistor Chip
PROCESS Small Signal Transistor CP388X NPN - Low Noise Amplifier Transistor Chip PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY GROSS DIE PER 5 INCH WAFER 102,852 PRINCIPAL DEVICE TYPES CMKT5089M10 CMST5089 2N4104 EPITAXIAL PLANAR 13 x 13 MILS 5.9 MILS 3.9 x 3.9 MILS 5.4 x 5.4 MILS Al-Si - 17,000Å Au - 12,000Å BACKSIDE COLLECTOR R0 R2 (29-April 2010) w w w.
c e n t r a l s e m i .
c o m h
