54LS74A
1.44MB
Dual d-type positive-edge -triggered flip-flops.
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📁 Related Datasheet
54LS74 - Dual Positive-Edge-Triggered D Flip-Flops
(National Semiconductor)
..
54LS74 DM54LS74A DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset Clear and Complementary Outputs
June 1989
54LS.
54LS75 - 4-BIT D LATCH
(Motorola)
4-BIT D LATCH
The TTL/MSI SN54 / 74LS75 and SN54 / 74LS77 are latches used as temporary storage for binary information between processing units and in.
54LS76A - DUAL J-K FLIP-FLOPS
(Texas Instruments)
SN5476, SN54LS76A
SN7476, SN74LS76A DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR
SDLS121 – DECEMBER 1983 – REVISED MARCH 1988
PRODUCTION DATA informatio.
54LS76A - DUAL JK FLIP-FLOP
(Motorola)
DUAL JK FLIP-FLOP WITH SET AND CLEAR
The SN54 / 74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops.
54LS77 - 4-BIT D LATCH
(Motorola)
4-BIT D LATCH
The TTL/MSI SN54 / 74LS75 and SN54 / 74LS77 are latches used as temporary storage for binary information between processing units and in.
54LS00 - QUAD 2-INPUT NAND GATE
(ETC)
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54LS00 - Quad 2-Input NAND Gates
(National Semiconductor)
54LS00 DM54LS00 DM74LS00 Quad 2-Input NAND Gates
June 1989
54LS00 DM54LS00 DM74LS00 Quad 2-Input NAND Gates
General Description
This device contains.
54LS02 - Quad 2-Input NOR Gates
(National Semiconductor)
54LS02 DM54LS02 DM74LS02 Quad 2-Input NOR Gates
June 1989
54LS02 DM54LS02 DM74LS02 Quad 2-Input NOR Gates
General Description
This device contains f.
54LS03 - Quad 2-Input NAND Gates
(National Semiconductor)
54LS03 DM54LS03 DM74LS03 Quad 2-Input NAND Gates with Open-Collector Outputs
June 1989
54LS03 DM54LS03 DM74LS03 Quad 2-Input NAND Gates with Open-Co.
54LS04 - HEX INVERTER
(Motorola)
SN54/74LS04 HEX INVERTER
HEX INVERTER
VCC 14 13 12 11 10 9 8
LOW POWER SCHOTTKY
1
2
3
4
5
6
7 GND
14 1
J SUFFIX CERAMIC CASE 632-08
14 1
N.
