74AC11379 Datasheet - Texas Instruments

74AC11379 Quad D-Type Flip-Flop

These circuits are positive-edge-triggered D-type flip-flops with a clock-enable input. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if the clock-enable input (CLKEN) is low. Clock triggering occurs at a.

Contains Four Flip-Flops with Double-Rail Outputs Clock Enable Latched to Avoid False Clocking Applications Include: Buffer/Storage Registers, Shift Registers, Pattern Generators Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options .

74AC11379-etcTI.pdf