74AC11898 Datasheet - Texas Instruments

74AC11898 10-BIT PARALLEL-OUT SERIAL SHIFT REGISTER

ą 74AC11898 10ĆBIT PARALLELĆOUT SERIAL SHIFT REGISTER ą SCAS143 OCTOBER 1990 REVISED APRIL 1993 AND-Gated (Enable/Disable) Serial Inputs Fully Buffered Clock and Serial Inputs Direct Clear Fully Synchronous Data Transfers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process <.

74AC11898 Features

* AND-gated serial inputs and an asynchronous clear. The gated serial inputs (A and B) permit complete control over incoming data. A low at either input inhibits entry of new data and resets the first flip-flop to the low level on the rising edge of the next clock pulse. A high-level input enables the

74AC11898 Datasheet (93.40 KB)