CBTLV3857 - LOW-VOLTAGE 10-BIT FET BUS SWITCH
ordering information This 10-bit FET bus switch is designed for 3-V to 3.6-V VCC operation and SSTL_2 output-enable (OE) input levels.
When OE is low, the 10-bit bus switch is on, and port A is connected to port B.
When OE is high, the switch is open, and the high-impedance state exists between the
D Enable Signal Is SSTL_2 Compatible D Flow-Through Architecture Optimizes PCB Layout D Designed for Use With 200 Mbit/s Double Data-Rate (DDR) SDRAM Applications D Switch On-State Resistance Is Designed to Eliminate Series Resistor to DDR SDRAM D Internal 10-kΩ Pulldown Resistors to Ground on B Port D Internal 50-kΩ Pullup Resistor on Output-Enable Input D Rail-to-Rail Switching on Data I/O Ports D Ioff Supports Partial-Power-Down Mode Operation D Latch-Up Performance Exceeds 100 mA Per JESD 78
