Description
CD74HCT138E
-55 to 125
16 Ld PDIP
The ’HC138, ’HC238, ’HCT138, and ’HCT238 are high-speed silicon-gate CMOS decoders well suited to memory address decoding or data-routing applications.Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low-power Schottky TTL logic.Both circuits have three binary select inputs (A0, A1, and A2).If the device is enabled, these inputs determine which one of the eight normally high outputs of the H
Features
- Select One Of Eight Data Outputs Active Low for 138, Active High for 238.
- l/O Port or Memory Selector.
- Three Enable Inputs to Simplify Cascading.
- Typical CL = 15
Propagation Delay pF, TA = 25oC
of
13
ns
at
VCC
=
5
V,.
- Fanout (Over Temperature Range)
- Standard Outputs.
- 10 LSTTL Loads
- Bus Driver Outputs.
- . . . 15 LSTTL Loads.
- Wide Operating Temperature Range . . . -55oC to 125oC.
