CD54HCT00J, CD54HC00 Datasheet - Texas Instruments

CD54HCT00J - Quadruple 2-Input NAND Gates

This device contains four independent 2-input NAND gates. Each gate performs the Boolean function Y = A * B in positive logic. Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) CD74HCT00M SOIC (14) 8.65 mm × 3.90 mm CD74HCT00E PDIP (14) 19.30 mm × 6.40 mm CD54HCT00J CDIP (14).

CD54HCT00J Features

* LSTTL input logic compatible

* VIL(max) = 0.8 V, VIH(min) = 2 V

* CMOS input logic compatible

* II ≤ 1 µA at VOL, VOH

* Buffered inputs

* 4.5 V to 5.5 V operation

* Wide operating temperature range:

* 55°C to +125°C

* Supports

CD54HC00-etcTI.pdf