Description
The CDCDB2000 is a 20-output LP-HCSL, DB2000QL compliant, clock buffer capable of distributing the reference clock for PCIe Gen 1-5, QuickPath Interconnect (QPI), UPI, SAS, and SATA interfaces.
Features
- 1 20 LP-HCSL outputs with integrated 85-Ω output terminations.
- 8 hardware output enable (OE#) controls.
- Additive phase jitter after DB2000QL filter:
< 0.08ps rms.
- Supports PCIe Gen 4 and Gen 5 Common Clock
(CC) and Individual Reference (IR) architectures.
- Spread spectrum-compatible.
- Cycle-to-cycle jitter: < 50 ps.
- Output-to-output skew: < 50 ps.
- Input-to-output delay: < 3 ns.
- 3.3-V core and IO supply voltages.
CDCDB2000-etcTI.pdf
