* 1
* High Performance LVPECL, LVDS, LVCMOS PLL Clock Synchronizer
* Two Reference Clock Inputs (Primary and Secondary Clock) for Redundancy Support with Manual or Automatic Selection
* Accepts Two Differential Input (LVPECL or LVDS) References up to 500MHz (or Two LVCMOS Input
CDCE72010
2.41 MB
Ten output high performance clock synchronizer / jitter cleaner / clock distributor.
CDCE72010
www.ti.com
SCAS858C
* JUNE 2008
* REVISED JANUARY 2012
Ten Output High Performance Clock Synchronizer, Jitter Cleaner, an.
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