CDCS504-Q1 Datasheet - Texas Instruments

CDCS504-Q1 Clock Buffer and Clock Multiplier

The CDCS504-Q1 device is a LVCMOS input clock buffer with selectable frequency multiplication. The CDCS504-Q1 has an output enable pin. The device accepts a 3.3-V LVCMOS signal at the input. The input signal is processed by a phased-locked loop (PLL), whose output frequency is either equal to the in.

CDCS504-Q1 Features

* 1 Qualified for Automotive Applications

* AEC-Q100 Test Guidance With the Following Results:

* Device Temperature Grade 2:

* 40°C to 105°C Ambient Operating Temperature Range

* Device HBM ESD Classification Level H2

* Device CDM ESD Classification Leve

CDCS504-Q1-etcTI.pdf