PGA112 Datasheet - Texas Instruments

PGA112 Zero-Drift Programmable Gain Amplifier

The PGA112 and PGA113 devices (binary and scope gains) offer two analog inputs, a three-pin SPI interface, and software shutdown in a 10-pin, VSSOP package. The PGA116 and PGA117 (binary and scope gains) offer 10 analog inputs, a SPI interface with daisy-chain capability, and hardware and software s.

PGA112 Features

* 1 Rail-to-Rail Input and Output

* Offset: 25 μV (Typical), 100 μV (Maximum)

* Zerø Drift: 0.35 μV/°C (Typical), 1.2 μV/°C (Maximum)

* Low Noise: 12 nV/√Hz

* Input Offset Current: ±5 nA Maximum (25°C)

* Gain Error: 0.1% Maximum (G ≤ 32), 0.3% Maximum (

PGA112-etcTI.pdf