* 1
* 20-ns Read, 13.8-ns Write Through Maximum Access Time
* Functionally Compatible With Commercial 512K x 32 SRAM Devices
* Built-In EDAC (Error Detection and Correction) to Mitigate Soft Errors
* Built-In Scrub Engine for Autonomous Correction
* CMOS Compati
SMV512K32-SP Datasheet (518.54 KB)
SMV512K32-SP
518.54 KB
16-mb radiation-hardened sram.
SMV512K32-SP
www.ti.com
SLVSA21I
* JUNE 2011
* REVISED JANUARY 2014
16-Mb RADIATION-HARDENED SRAM
Check for Samples: SMV512K32-SP
.
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