Datasheet Details
Part number:
SN54ABTH32543
Manufacturer:
File Size:
353.10 KB
Description:
36-BIT REGISTERED BUS TRANSCEIVERS
D Members of the Texas Instruments Widebus+™ Family D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design Significantly Reduces Power Dissipation D Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 D Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 5 V, TA = 25°C D High-Impedance State During
SN54ABTH32543, 36-BIT REGISTERED BUS TRANSCEIVERS
The ’ABTH32543 are 36-bit registered transceivers that contain two sets of D-type latches for temporary storage of data flowing in either direction.
These devices can be used as two 18-bit transceivers or one 36-bit transceiver.
Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) i
D Members of the Texas Instruments Widebus+™ Family D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design Significantly Reduces Power Dissipation D Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 D Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 5 V, TA = 25°C D High-Impedance State During Power Up and Power Down D Released as DSCC SMD 5962-9557801NXD SN54ABTH32543, SN74ABTH32543 36-BIT REGISTERED BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS230F JUNE 1992 REVISED MAY
SN54ABTH32543 Distributor
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