SN54LV20A Datasheet - Texas Instruments

SN54LV20A, DUAL 4-INPUT POSITIVE NAND GATE

SN54LV20A, SN74LV20A DUAL 4ĆINPUT POSITIVEĆNAND GATE D 2-V to 5.5-V VCC Operation D Max tpd of 6 ns at 5 V D Typical VOLP (Output Ground Bounce) <0.8

Applications

* using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. NC 3 2 1 20 19 4 18 2C NC 5 17 NC 1C 6 16 NC NC 7 15 NC 1D 8 14 2B 9 10 11 12 13 NC
* No internal connection ORDERING INFORMATION TA PACKA

SN54LV20A-etcTI.pdf