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SN65DSI86 - MIPI DSI to eDP Bridge

SN65DSI86 Description

www.ti.com SN65DSI86 SLLSEH2C * SEPTEMBER 2013 * REVISED OSCNTO6B5EDRS2I08260 SLLSEH2C * SEPTEMBER 2013 * REVISED OCT.
The SN65DSI86 DSI to embedded DisplayPort (eDP) bridge features a dual-channel MIPI D-PHY receiver front-end configuration with four lanes per channel.

SN65DSI86 Features

* Embedded DisplayPort™ ( eDP™) 1.4 compliant supporting 1, 2, or 4 lanes at 1.62 Gbps (RBR), 2.16 Gbps, 2.43 Gbps, 2.7 Gbps (HBR), 3.24 Gbps, 4.32 Gbps, or 5.4 Gbps (HBR2).
* Implements MIPI® D-PHY version 1.1 physical layer front-end and display serial interface (DSI) version 1.02.

SN65DSI86 Applications

* PC & notebooks
* Tablets
* Retail automation & payment
* Test and measurement

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MIPI DSI eDP Bridge Texas Instruments
Texas Instruments SN65DSI86-like datasheet