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SN65ELT23 5-V Dual Differential PECL Buffer-to-TTL Translator

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Description

SN65ELT23 www.ti.com SLLS925 * JUNE 2009 5-V Dual Differential PECL Buffer-to-TTL Translator .
PIN D0, D0, D1, D1 Q0, Q1 PECL inputs TTL outputs FUNCTION DESCRIPTION VCC Positive supply GND The SN65ELT23 is a low power dual PECL-to-TTL.

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Features

* 1
* Dual 5-V Differential PECL-to-TTL Buffer
* 24-mA TTL Ouputs
* Operating Range
* PECL VCC = 4.75 V to 5.25 V with GND = 0 V
* Support for Clock Frequencies of 250 MHz (TYP)
* 3.5-ns Typical Propagation Delay
* Output Default Low with Inputs

Applications

* Data and Clock Transmission Over Backplane

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