SN65LVDS310 Datasheet (Texas Instruments) - PROGRAMMABLE 27-BIT SERIAL-TO-PARALLEL RECEIVER

SN65LVDS310, PROGRAMMABLE 27-BIT SERIAL-TO-PARALLEL RECEIVER

The SN65LVDS310 receiver deserializes FlatLink 3G-compliant serial input data to 27 parallel data outputs.

The SN65LVDS310 receiver contains one shift register to load 30 bits from one serial input and latches the 24 pixel bits and 3 control bits out to the parallel CMOS outputs after checking the p

SN65LVDS310 Features

* Serial Interface Technology

* Compatible With FlatLink™ 3G Transmitters (E.g., SN65LVDS305 or SN65LVDS307)

* Supports Video Interfaces up to 24-Bit RGB Data and 3 Control Bits Received Over One SubLVDS Differential Data Line

* SubLVDS Differential Voltage Levels