SN65LVP17 Datasheet, Stage/buffers, Texas Instruments

✔ SN65LVP17 Features

Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs
Clock Rates to 2 GHz
140-ps Output Transition Times
0.11 ps Typical Intrinsic Phase Jitter
Less than

✔ SN65LVP17 Application

PECL-to-LVDS Translation
Clock Signal Amplification DESCRIPTION These four devices are high-frequency o

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SN65LVP17

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📄 Datasheet

Description:

2.5-v/3.3-v oscillator gain stage/buffers. These four devices are high-frequency oscillator gain stages supporting both LVPECL or LVDS on the high gain outputs in 3.3-V or 2.5-

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SN65LVP17DRFT

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SN65LVP17 2.5-V 3.3-V OSCILLATOR GAIN STAGE BUFFERS Texas Instruments