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SN74AUC2G34 DUAL BUFFER GATE

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Description

www.ti.com SN74AUC2G34 DUAL BUFFER GATE SCES514B * NOVEMBER 2003 * REVISED JANUARY 2007 .
ORDERING INFORMATION This dual buffer gate is operational at 0.

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Features

* Available in the Texas Instruments NanoFree™ Package
* Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
* Ioff Supports Partial-Power-Down Mode Operation
* Sub-1-V Operable
* Max tpd of 1.6 ns at 1.8 V

Applications

* using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. TA
* 40°C to 85°C ORDERING INFORMATION PACKAGE (1) ORDERABLE PART NUMBER TOP-SIDE MARKING(2) NanoFree™
* WCSP (DSBGA) 0.23-mm Large Bump

SN74AUC2G34 Distributors

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