Datasheet4U Logo Datasheet4U.com

SN74AUC2G34 DUAL BUFFER GATE

SN74AUC2G34 Description

www.ti.com SN74AUC2G34 DUAL BUFFER GATE SCES514B * NOVEMBER 2003 * REVISED JANUARY 2007 .
ORDERING INFORMATION This dual buffer gate is operational at 0.

SN74AUC2G34 Features

* Available in the Texas Instruments NanoFree™ Package
* Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
* Ioff Supports Partial-Power-Down Mode Operation
* Sub-1-V Operable
* Max tpd of 1.6 ns at 1.8 V

SN74AUC2G34 Applications

* using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. TA
* 40°C to 85°C ORDERING INFORMATION PACKAGE (1) ORDERABLE PART NUMBER TOP-SIDE MARKING(2) NanoFree™
* WCSP (DSBGA) 0.23-mm Large Bump

📥 Download Datasheet

Preview of SN74AUC2G34 PDF
datasheet Preview Page 2 datasheet Preview Page 3

📁 Related Datasheet

  • SN74101 - AND-OR Gate (ETC)
  • SN74102 - AND Gate (ETC)
  • SN74103 - Dual J-K Flip-Flop (ETC)
  • SN74106 - Dual J-K Flip-Flop (ETC)
  • SN74108 - Dual J-K Flip Flop (ETC)
  • SN7411 - Triple 3-Input AND (ETC)
  • SN74120 - Dual Pulse Synchronizers / Drivers (Texas Instruments Inc)
  • SN74124 - Dual Voltage Controlled Oscillators (ETC)

📌 All Tags

DUAL BUFFER GATE Texas Instruments
Texas Instruments SN74AUC2G34-like datasheet