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SN74AUC74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

SN74AUC74 Description

www.ti.com SN74AUC74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCES483A * AUGUST 2003 * REVISED MARCH 2005 .
ORDERING INFORMATION This dual positive-edge-triggered D-type flip-flop is operational at 0.

SN74AUC74 Features

* Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
* Ioff Supports Partial-Power-Down Mode Operation
* Sub-1-V Operable
* Max tpd of 1.8 ns at 1.8 V
* Low Power Consumption, 10-µA Max ICC
* ±8-mA Output Dri

SN74AUC74 Applications

* using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION TA
* 40°C to 85°C QFN
* RGY PACKAGE (1) Tape and reel ORDERABLE PART NUMBER SN74AUC74RGYR TOP-SIDE MARKING MS74 (1) Package

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DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP Texas Instruments
Texas Instruments SN74AUC74-like datasheet