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SN74AUP1T08 Positive-AND Gate

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Description

www.ti.com SN74AUP1T08 SCES801A * APRIL 2010 * REVISEDSSENP7T4EAMUBEPR12T00280 SCES801A * APRIL 2010 * REVISED SEPTEM.
The SN74AUP1T08 performs the Boolean function Y = A. B or Y = A + B with designation for logic-level translation applications with output re.

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Features

* ESD Performance Tested Per JESD 22
* 2000-V Human-Body Model (A114-B, Class II)
* 1000-V Charged-Device Model (C101)
* Single-Supply Voltage Translator
* Output Level Up to Supply VCC CMOS Level
* 1.8 V to 3.3 V (at VCC = 3.3 V)
* 2.5 V to 3.

Applications

* with output referenced to supply VCC. AUP technology is the industry's lowest-power logic technology designed for use in extending battery-life in operating. All input levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply. This product also maintains

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