Description
3 2.1 Device Description 3 2.2 Power Supply 4 2.3 Clock Control 4 2.4 Serial Audio Ports (SAPs) 4 2.5 M8051Warp Microprocessor 4 2.6 I2C Control Interface 4 2.7 Audio DSP Core 5
3 Physical Characteristics 6 3.1 Terminal Assignments 6 3.2 Terminal Descriptions 7 3.3 Reset (RESET) 7 3.4 Power-On Reset (RESET) 8 3.5 Power Down (PDN) 8 3.6 I2C Bus Control (CS0) 8 3.7 Programmable General Purpose I/O (GPIO) 8 3.8 Input and Output Serial Audio Ports 9
4 Algorithm and Software Development Too
Features
- 8 channel Programmable Audio Digital Signal Processor (DSP).
- 135-MHz Maximum Speed, >2800 Processing Cycles Per Sample at 48 kHz.
- Sample Rates of 32 kHz to 192 kHz.
- 48-Bit Data Path and 28-Bit Coefficients.
- Single-Cycle, 76-Bit Multiply Accumulate.
- Five Simultaneous Operations Per Clock Cycle.
- 1022 Words of 48-Bit Data Memory.
- 1022 Words of 28-Bit Coefficient Memory.
- 3K Words of 54-Bit Program RAM.
- 5.88K W.