TI380C30A Datasheet - Texas Instruments

TI380C30A Integrated Token-Ring CommProcessor And Physical Layer Interface

TI380C30A INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE SPWS034 MARCH 1998 D Single-Chip Token-Ring Solution D IBM™ Token-Ring Network™ Compatible D Compatible With ISO/IEC IEEE Std 802.5:1992 Token-Ring Access-Method and Physical-Layer Specifications D Compatible With TI380FPA PacketBlaster™ D Glueless Memory Interface D Digital Phase-Locked Loop (PLL) Precise Control of Bandwidths Improved Jitter Tolerance Minimizes Accumulated Phase .

TI380C30A Features

* 16- or 4-Megabit-Per-Second (Mbit/s) Data Rates

* Supports up to 18K-Byte Frame Size (16 Mbit/s Only)

* Supports Universal and Local Addressing

* Early Token-Release Option (16 Mbit/s Only)

* Built-In Real-Time Error Detection

* Automatic Frame-Buffe

TI380C30A Datasheet (1.11 MB)