74ALVC162836ADGG Datasheet - nexperia

74ALVC162836ADGG 20-bit registered driver

The 74ALVC162836A is a 20-bit universal bus driver. Data flow is controlled by output enable (OE), latch enable (LE) and clock inputs (CP). When LE is HIGH, the An to Yn data flow is transparent. When LE is HIGH and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP t.

74ALVC162836ADGG Features

* Wide supply voltage range from 1.2 V to 3.6 V

* CMOS low-power consumption

* Direct interface with TTL levels

* Current drive ± 12 mA at 3.0 V

* MULTIBYTE flow-through standard pin-out architecture

* Low inductance multiple VCC and GND pins for minim

74ALVC162836ADGG Datasheet (193.16 KB)