74ALVCH16821DGG Datasheet - nexperia

74ALVCH16821DGG 20-bit bus-interface D-type flip-flop

The 74ALVCH16821 has two 10-bit, edge triggered registers, with each register coupled to a 3-state output buffer. The two sections of each register are controlled independently by the clock (nCP) and output enable (nOE) control gates. Each register is fully edge triggered. The state of each nDn inp.

74ALVCH16821DGG Features

* Wide supply voltage range from 1.2 V to 3.6 V

* CMOS low-power consumption

* Direct interface with TTL levels

* Current drive ± 24 mA at 3.0 V

* MULTIBYTE flow-through standard pin-out architecture

* Low inductance multiple VCC and GND pins for mini

74ALVCH16821DGG Datasheet (188.24 KB)