74ALVT162823 Datasheet - nexperia

74ALVT162823 18-bit bus-interface D-type flip-flop

The 74ALVT162823 18-bit bus interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data or address paths of buses carrying parity. The 74ALVT162823 has two 9-bit wide buffered registers with clock enable (nCE) and m.

74ALVT162823 Features

* Two sets of high speed parallel registers with positive edge-triggered D-type flip-flops

* 5 V I/O compatible

* Ideal where high speed, light loading or increased fan-in are required with MOS microprocessors

* Bus hold data inputs eliminate the need for external pul

74ALVT162823 Datasheet (214.80 KB)