Datasheet4U Logo Datasheet4U.com

74LVT126 - quad buffer

Datasheet Summary

Description

The 74LVT126 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE).

A LOW on nOE causes the outputs to assume a high impedance OFF-state.

Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs.

Features

  • Quad bus interface.
  • 3-state buffers.
  • Wide supply voltage range from 2.7 to 3.6 V.
  • Overvoltage tolerant inputs to 5.5 V.
  • BiCMOS high speed and output drive.
  • Output capability: +64 mA and -32 mA.
  • Direct interface with TTL levels.
  • Input and output interface capability to systems at 5 V supply.
  • Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs.
  • Live insertion and extr.

📥 Download Datasheet

Datasheet preview – 74LVT126

Datasheet Details

Part number 74LVT126
Manufacturer nexperia
File Size 236.22 KB
Description quad buffer
Datasheet download datasheet 74LVT126 Datasheet
Additional preview pages of the 74LVT126 datasheet.

📁 Similar Datasheet

  • 74LVT126 - 3.3V Quad buffer (NXP)
  • 74LVT125 - 3.3V Quad buffer (NXP)
  • 74LVT10 - 3.3V Triple 3-input NAND gate (NXP)
  • 74LVT14 - 3.3V Hex inverter Schmitt trigger (NXP)
  • 74LVT1403 - 3.3V combined 8-bit bus receiver and 4-bit bus driver (NXP)
  • 74LVT162240 - Low Voltage 16-Bit Inverting Buffer/Line Driver (Fairchild Semiconductor)
  • 74LVT162240A - 3.3V LVT 16-bit inverting buffer/driver (NXP)
  • 74LVT162244 - Low Voltage 16-Bit Buffer/Line Driver (Fairchild Semiconductor)
  • 74LVT162244B - 3.3V 16-bit buffer/driver (NXP)
  • 74LVT162245 - Low Voltage 16-Bit Transceiver (Fairchild Semiconductor)
Other Datasheets by nexperia

Full PDF Text Transcription

Click to expand full text
74LVT126 3.3 V quad buffer; 3-state Rev. 6 — 27 July 2021 Product data sheet 1. General description The 74LVT126 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A LOW on nOE causes the outputs to assume a high impedance OFF-state. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Quad bus interface • 3-state buffers • Wide supply voltage range from 2.7 to 3.6 V • Overvoltage tolerant inputs to 5.
Published: |