74VHCT595 Datasheet - nexperia

74VHCT595 8-bit serial-in/serial-out or parallel-out shift register

The 74VHC595; 74VHCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The 74VHC595; 74VHCT595 are 8-stage serial shift registers with a storage register and 3-state outputs. The shift register.

74VHCT595 Features

* Balanced propagation delays

* All inputs have Schmitt-trigger action

* Inputs accept voltages higher than VCC

* Input levels:

* For 74VHC595: CMOS level

* For 74VHCT595: TTL level

* ESD protection:

* HBM JESD22-A114F exceeds 2000 V

74VHCT595 Datasheet (297.58 KB)