HEF4027BT

Dual JK flip-flop

nexperia

HEF4027BT Features

* Wide supply voltage range from 3.0 V to 15.0 V

* CMOS low power dissipation

* High noise immunity

* Fully static operation

* 5 V, 10 V, and 15 V parametric ratings

* Standardized symmetrical output characteristics

* Complies with JEDEC standa

HEF4027BT General Description

The HEF4027B is a dual positive-edge triggered JK flip-flop featuring independent set direct (nSD), clear direct (nCD), clock inputs (nCP) and complementary outputs (nQ and nQ). Data is accepted when nCP is LOW, and transferred to the output on the positive-going edge of the clock. The asynchronous .

HEF4027BT Datasheet (217.51 KB)