NPIC6C4894-Q100 Datasheet - nexperia

NPIC6C4894-Q100 Power logic 12-bit shift register

The NPIC6C4894-Q100 is a 12-stage serial shift register. It has a storage latch associated with each stage for strobing data from the serial input (D) to the parallel open-drain outputs (QP0 to QP11). Data is shifted on positive-going clock (CP) transitions. The data in each shift register stage is .

NPIC6C4894-Q100 Features

* Automotive product qualification in accordance with AEC-Q100 (Grade 1)

* Specified from 40 C to +125 C

* Low RDSon

* 12 Power EDNMOS transistor outputs of 100 mA continuous current

* 250 mA current limit capability

* Output clamping voltage 33 V

* 30 mJ avalanche ene

NPIC6C4894-Q100-nexperia.pdf