PDI1284P11 Datasheet PDF - nexperia parallel interface transceiver/buffer Specs

PDI1284P11 - parallel interface transceiver/buffer

Datasheet Summary

Description

The PDI1284P11 parallel interface chip is designed to provide an asynchronous, 8-bit, bidirectional, parallel interface for personal computers.

The PDI1284P11 includes all 19 signal lines deﬁned by the IEEE 1284 interface speciﬁcation for Byte, Nibble, EPP, and ECP modes.

Features

I Asynchronous operation I 8-bit transceivers I Six additional buffer/driver lines peripheral to cable I Five additional control lines from cable I 5 V tolerant I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V I Latch-up current protection exceeds 500 mA per JEDEC Std 19 I Input hysteresis I Low-noise operation I IEEE 1284 compliant level 1 and 2 I Overvoltage protection on B/Y side for off-state I A side 3-state option I B side active or resistive pull-up opt.

Datasheet Details

Part number	PDI1284P11
Manufacturer	nexperia
File Size	590.38 KB
Description	parallel interface transceiver/buffer
Datasheet	PDI1284P11 Datasheet
Additional preview pages of the PDI1284P11 datasheet.

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Full PDF Text Transcription

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PDI1284P11 3.3 V parallel interface transceiver/buffer Rev. 03 — 25 August 2008 Product data sheet 1. General description The PDI1284P11 parallel interface chip is designed to provide an asynchronous, 8-bit, bidirectional, parallel interface for personal computers. The PDI1284P11 includes all 19 signal lines deﬁned by the IEEE 1284 interface speciﬁcation for Byte, Nibble, EPP, and ECP modes. The PDI1284P11 is designed for hosts or peripherals operating at 3.3 V to interface 3.3 V or 5.0 V devices. The eight transceiver pairs (A/B 1 to 8) allow data transmission from the A-bus to the B-bus, or from the B-bus to the A-bus, depending on the state of the direction pin DIR.

Published: Jul 25, 2019 |